Lagadapati Rajagopal (Telugu: లగడపాటి రాజగొపాల్ ;Born 16 February 1961) is 14th Lok Sabha member of parliament from the Vijaywada constituency. He is the son-in-law of ex-minister Parvathaneni Upendra. He completed his B.Tech in Mechanical Engineering from V.R.Siddhartha Engineering College, Vijayawada which happens to be one of the private engineering college's in Andhra Pradesh.
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